System Call

A system call is a request made by any arbitrary program to the operating system for performing tasks -- picked from a predefined set -- which the said program does not have required permissions to execute in its own flow of execution. Most operations interacting with the system require permissions not available to a user level process, i.e. any I/O performed with any arbitrary device present on the system or any form of communication with other processes requires the use of system calls.

System Call

A system call is a request made by any arbitrary program to the operating system for performing tasks -- picked from a predefined set -- which the said program does not have required permissions to execute in its own flow of execution. Most operations interacting with the system require permissions not available to a user level process, i.e. any I/O performed with any arbitrary device present on the system or any form of communication with other processes requires the use of system calls.

Interrupts

An interrupt is an event in hardware that triggers the processor to jump from its current program counter to a specific point in the code. Interrupts are designed to be special events whose occurrence cannot be predicted precisely (or at all). The MSP has many different kinds of events that can trigger interrupts, and for each one the processor will send the execution to a unique, specific point in memory. Each interrupt is assigned a word long segment at the upper end of memory. This is enough memory for a jump to the location in memory where the interrupt will actually be handled. Interrupts in general can be divided into two kinds- maskable and non-maskable. A maskable interrupt is an interrupt whose trigger event is not always important, so the programmer can decide that the event should not cause the program to jump. A non-maskable interrupt (like the reset button) is so important that it should never be ignored. The processor will always jump to this interrupt when it happens. Often, maskable interrupts are turned off by default to simplify the default behavior of the device. Special control registers allow non-maskable and specific non-maskable interrupts to be turned on. Interrupts generally have a "priority;" when two interrupts happen at the same time, the higher priority interrupt will take precedence over the lower priority one. Thus if a peripheral timer goes off at the same time as the reset button is pushed, the processor will ignore the peripheral timer because the reset is more important (higher priority).

A two-phase-clock generator which generates a first clock and a nonoverlapping second clock from an input clock by utilizing gate delays, comprising:

a first floating inverter and a second floating inverter each having an input, an output, a first supply terminal and a second supply terminal, said input of said first logic gate and said input of said second logic gate being coupled to said input clock in antiphase, and said first supply terminals of each of said first and second floating inverters connected to a supply voltage;

a first output buffer having an input coupled to said output of said first floating inverter and having an output that provides said first clock, said output further being provided as feedback to said second supply terminal of said second floating inverter; and

a second output buffer having an input coupled to said output of said second floating inverter and having an output that provides said nonoverlapping second clock, said output further being provides as feedback to said second supply terminal of said first floating inverter.

A two-phase clock generator generates a nonoverlapping two-phase clock from a unipolar input clock by utilizing gate delays in first and second signal paths. The output of each signal path is fed over a cross-coupled feedback path back to a logic gate in the respective other signal path. Each logic gate is a floating inverter having a first supply terminal connected to a supply voltage, and having a second supply terminal that is the feed point for the respective feedback signal from the output of the other signal path.

ADDRESSING METHODS

ADDRESSING METHODS


ABSOLUTE (DIRECT) ADDRESSING

- The address of operand is given explicity as part of the instruction



IMPLIED ADDRESSING

- The address is implied by the instruction (e.g.,in one-address machine, the address
of the second operand is implied as being accumulator)


IMMEDIATE ADDRESSING

- The operand is given explicitly as the instruction. No memory
access is required. Also operand could follow immediately after the instruction.


INDIRECT ADDRESSING
- The effective address of the operand is in the register or main memory location
whose address appears in the instruction. It can have more than one level.


INDEXED ADDRESSING
- The effective address (EA) of the operand is generated by adding an index register
value (X) to the direct address (DA)
- EA = X + DA


BASE ADDRESSING

- The effective address of the operand is generated by adding base register value (B)
to the address
- EA = B + DA
CA - IV - D&IF - 16


SELF-RELATIVE ADDRESSING

- Effective address is a sum of a direct address and a program counter contents (PC).
EA = DA + PC


AUGMENTED ADDRESSING

- Effective address is a concatenation of the contents of the augmented address
register (AAR) and direct address.
EA = AAR || DA
(AAR often specifies a page and DA is an address within this
particular page)


BLOCK ADDRESSING

- Address of the first word in the block is given. Length of the block is usually specified
in the instruction; or also the last address can be given; or special end-of-block
character can be given; or blocks may have fixed length. Very useful in the
secondary storage management.

INTERRUPTS

see this to know about interrupts: http://en.wikipedia.org/wiki/Interrupt

IMPLEMENTATIONS OF SYSTEM CALLS

Typical implementations
Implementing system calls requires a control transfer which involves some sort of architecture specific feature. A typical way to implement this is to use a software interrupt or trap. Interrupts transfer control to the kernel so software simply needs to set up some register with the system call number they want and execute the software interrupt.
For many RISC processors this is the only feasible implementation, but CISC architectures such as x86 support additional techniques. One example is SYSCALL/SYSRET which is very similar to SYSENTER/SYSEXIT (the two mechanisms were created by Intel and AMD independently, but do basically the same thing). These are "fast" control transfer instructions that are designed to quickly transfer control to the kernel for a system call without the overhead of an interrupt. Linux 2.5 began using this on the x86, where available; formerly it used the INT instruction, where the system call number was placed in the EAX register before interrupt 0x80 was executed.[1]
An older x86 mechanism is called a call gate and is a way for a program to literally call a kernel function directly using a safe control transfer mechanism the kernel sets up in advance. This approach has been unpopular, presumably due to the requirement of a far call which uses x86 memory segmentation and the resulting lack of portability it causes, and existence of the faster instructions mentioned above.