Associative Memory

Content-addressable memory (CAM) is a special type of computer memory used in certain very high speed searching applications. It is also known as associative memory, associative storage, or associative array, although the last term is more often used for a programming data structure.

Unlike standard computer memory (random access memory or RAM) in which the user supplies a memory address and the RAM returns the data word stored at that address, a CAM is designed such that the user supplies a data word and the CAM searches its entire memory to see if that data word is stored anywhere in it. If the data word is found, the CAM returns a list of one or more storage addresses where the word was found (and in some architectures, it also returns the data word, or other associated pieces of data).

Answer to Meeras Doubt

http://www.cs.pitt.edu/~melhem/courses/1541/tutorial/chex.htm

Automatic Sequence Controlled Calculator (ASCC)

The IBM Automatic Sequence Controlled Calculator (ASCC), called the Mark I by Harvard University, was the first large-scale automatic digital computer in the USA. It is considered by some to be the first universal calculator.

The electromechanical ASCC was devised by Howard H. Aiken, created at IBM, shipped to Harvard in February 1944, and formally delivered there on August 7, 1944. The main advantage of the Mark I was that it was fully automatic—it didn't need any human intervention once it started. It was the first fully automatic computer to be completed. It was also very reliable, much more so than early electronic computers. It is considered to be "the beginning of the era of the modern computer" and "the real dawn of the computer age".

ASCC-Left Segment


The building elements of the ASCC were switches, relays, rotating shafts, and clutches. It was built using 765,000 components and hundreds of miles of wire, amounting to a size of 51 feet (16 m) in length, eight feet (2.4 m) in height, and two feet deep. It had a weight of about 10,000 pounds (4500 kg). The basic calculating units had to be synchronized mechanically, so they were run by a 50 foot (15 m) shaft driven by a five-horsepower (4 kW) electric motor.

ASCC-Right Segment


The Automatic Sequence Controlled Calculator (Harvard Mark I) was the first operating machine that could execute long computations automatically. A project conceived by Harvard University's Dr. Howard Aiken, the Mark I was built by IBM engineers in Endicott, N.Y. A steel frame 51 feet long and eight feet high held the calculator, which consisted of an interlocking panel of small gears, counters, switches and control circuits, all only a few inches in depth. The ASSC used 500 miles of wire with three million connections, 3,500 multipole relays with 35,000 contacts, 2,225 counters, 1,464 tenpole switches and tiers of 72 adding machines, each with 23 significant numbers. It was the industry's largest electromechanical calculator.

The Mark I could store 72 numbers, each 23 decimal digits long. It could do three additions or subtractions in a second. A multiplication took six seconds, a division took 15.3 seconds, and a logarithm or a trigonometric function took over one minute.

Details of Input/Output and Control


The Mark I read its instructions from a 24 channel punched paper tape and executed the current instruction and then read in the next one. It had no conditional branch instruction. This meant that complex programs had to be physically long. A loop was accomplished by joining the end of the paper tape containing the program back to the beginning of the tape (literally creating a loop). This separation of data and instructions is known as the Harvard architecture.

Hazards pipelining

HAZARDS, that prevent the next instruction in the instruction stream from being executing during its designated clock cycle. Hazards reduce the performance from the ideal speedup gained by pipelining.
There are three classes of hazards:
Structural Hazards:
They arise from resource conflicts when the hardware cannot support all possible combinations of instructions in simultaneous overlapped execution.
Data Hazards:
They arise when an instruction depends on the result of a previous instruction in a way that is exposed by the overlapping of instructions in the pipeline.
Control Hazards:
They arise from the pipelining of branches and other instructions that change the PC

Clarify my doubt friends..................

Can anyone explain me Control Hazards with a simple example???????????I could not understand it

Advantages and Disadvantages of Pipelining

Advantages and Disadvantages

Pipelining does not help in all cases. There are several disadvantages associated. An instruction pipeline is said to be fully pipelined if it can accept a new instruction every clock cycles. A pipeline that is not fully pipelined has wait cycles that delay the progress of the pipeline.

Advantages of pipelining:

The cycle time of the processor is reduced, thus increasing instruction bandwidth in most cases.

Advantages of not pipelining:
The processor executes only a single instruction at a time. This prevents branch delays (in effect, every branch is delayed) and problems with serial instructions being executed concurrently. Consequently the design is simpler and cheaper to manufacture.
The instruction latency in a non-pipelined processor is slightly lower than in a pipelined equivalent. This is due to the fact that extra flip flops must be added to the data path of a pipelined processor.
A non-pipelined processor will have a stable instruction bandwidth. The performance of a pipelined processor is much harder to predict and may vary more widely between different programs.

Structural Hazards

A "hazard'' is a circumstance that arises because of pipelining, that either will make implementing an instruction difficult or will cause errors in execution.

There are three classes of hazards:

1.Structural Hazards:
When a machine is pipelined, the overlapped execution of instructions requires pipelining of functional units and duplication of resources to allow all posible combinations of instructions in the pipeline. If some combination of instructions cannot be accommodated because of a resource conflict, the machine is said to have a structural hazard.

Common instances of structural hazards arise when :

1. Some functional unit is not fully pipelined
2. Some resource has not been duplicated enough to allow all combinations of instructions in the pipeline to execute.

Example: A machine may have only one register-file write port, but in some cases the pipeline might want to perform two writes in a clock cycle.

2.Data Hazards:

Data hazards occur when the pipeline changes the order of read/write accesses to operands so that the order differs from the order seen by sequentially executing instructions on the unpipelined machine.

Example:
ADD R1, R2, R3:Take for an instance the result of addition is placed in R1 at the end of fourth clock cycle,

SUB R4, R5, R1:Here R1's value is needed in the first clock cycle itself,This is the data hazard,as an instruction depends on the result of a previous instruction.

3.Control Hazards:

They arise from the pipelining of branches and other instructions that change the PC.