karnaugh's map and dont care conditions

KARNAUGH'S MAP:
The Karnaugh map, also known as a Veitch diagram (KV-map or K-map for short), is a tool to facilitate the simplification of Boolean algebra IC expressions. The Karnaugh map reduces the need for extensive calculations by taking advantage of human pattern-recognition and permitting the rapid identification and elimination of potential race hazards.
The Karnaugh map was invented in 1952 by Edward W. Veitch. It was further developed in 1953 by Maurice Karnaugh, a telecommunications engineer at Bell Labs, to help simplify digital electronic circuits.
In a Karnaugh map the boolean variables are transferred (generally from a truth table) and ordered according to the principles of Gray code in which only one variable changes in between squares. Once the table is generated and the output possibilities are transcribed, the data is arranged into the largest even group possible and the minterm is generated though the axiom laws of boolean algebra
DONT CARE CONDITIONS:
Karnaugh maps also allow easy minimizations of functions whose truth tables include "don't care" conditions (that is sets of inputs for which the designer doesn't care what the output is) because "don't care" conditions can be included in a ring to make it larger but do not have to be ringed. They are usually indicated on the map with a hyphen/dash/X in place of the number. The value can be a "0," "1," or the hyphen/dash/X depending on if one can use the "0" or "1" to simplify the KM more. If the "don't cares" don't help you simplify the KM more, then use the hyphen/dash/X.

imformations about lache and flipflop

Latch is a level sensitive memory element. As long as the latch enable is active, the latch is transparent, meaning the input appears on the output. When the enable goes in-active, the input is stored into the latch, the latch is closed, and a change in input will not be reflected on the latch's output. A flip-flop is a edge sensitive memory element, constructed using two latches. In a flip-flop, the input is sampled only at the rising or falling edge of the clock, after that the input is considered as dont care.

Dont care condition

Don’t Care Conditions
1) Don’t Care conditions only arise during design, they are never present as a result of analysis
Why? Once the circuit is built the output is always either 0 volts or 5 volts -- a logical “1” or a logical “0”.
There are NOT 3 outputs: 0 volts, 5 volts, and don’t care volts
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Applications of Decoder

1. It is now used in most wireless control system.
2.In the Television receiver,the original image is reconstructed essentially by reversing the operation of the video dishes to receive signals directly from satellites.
3.Most satellite delivered signals are scrambled and require a special decoder to receive them clearly

FLIP FLOP

Flip-Flops
"Flip-flop" is the common name given to two-state devices which offer basic memory for sequential logic operations. Flip-flops are heavily used for digital data storage and transfer and are commonly used in banks called "registers" for the storage of binary numerical data.

REFER THE FOLLOWING LINK FOR DETAILED DISCRIPTION :
http://hyperphysics.phy-astr.gsu.edu/Hbase/electronic/flipflop.html#c2

dont care condition

When the input can never occur
If an input can never occur, a don’t care can be used during design
An example is when BCD (binary coded decimal) is used to represent numbers. That is each decimal digit is represented by 4 bits (0 =0000, 1 = 0001, …, 9 = 1001).
Thus each decimal digit requires 4 bits but only 10 of the 16 possible combinations are used. Thus the outputs for inputs 1010, 1011, … , 1111 can be specified as don’t cares.
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Dont Care Condition

1.They represent the degrees of freedom of transforming a network in to an equivalent one.
2.We would not normally care to fill in the codes(1010,1011,1100,1101,1110,1111)because these codes will never exist as long as we are dealing only with BCD encoder numbers.These six invalid codes are dont cares